PMOS transistor

Shichman–Hodges P-channel MOSFET.

  • electrical
  • Modelica Standard Library
  • 4 ports
  • 2 parameters
BlockPMOS transistorKindpmosLibrarySemiconductors

Description

A P-channel MOSFET using a simplified Shichman–Hodges (level 1) model with a body effect. Drain and source are interchangeable: the higher-potential terminal acts as the source.

The fixed process parameters describe a small integrated device, not a power MOSFET.

Example

Transistor switches A CMOS inverter of an NMOS and a PMOS transistor, and NPN and PNP transistors switching loads.

InputGround (Input)VDD 5 VGround (VDD 5 V)PMOSNMOSGround (NMOS)Inverter outGround (out)Input, NPNGround (Input, NPN)VCC 5 VGround (VCC 5 V)R C 1 kΩR B 10 kΩNPNGround (NPN)CollectorGround (collector)Input, PNPGround (Input, PNP)VCC 5 V, PNPGround (VCC 5 V, PNP)R B 10 kΩ (PNP)PNPLoad 1 kΩGround (PNP load)Load voltageGround (load voltage)
In Gradara, select a PMOS transistor block and press F1, then choose Open example. It opens as a new model in My models, ready to run.

Also in this example:DC voltageVoltage sensorGroundResistorPulse voltageNMOS transistorNPN transistorPNP transistor

Ports

Conserving terminals 4

  • D

    Drain.

  • G

    Gate. Draws no current.

  • S

    Source.

  • B

    Bulk (body). Draws no current; it only shifts the threshold. Usually tied to S or the highest potential.

Parameters

  • WidthW0.00002 m

    ≥ 0

    Channel width, in meters. Must exceed 2.5 µm, since the effective width is W − 2.5 µm.

  • LengthL0.000006 m

    ≥ 0

    Channel length, in meters. Must exceed 2.1 µm, since the effective length is L − 2.1 µm.

Equations

Modelica
us = max(D.v, S.v), uds = min(D.v, S.v) − us, ubs = max(B.v − us, 0)
β = Beta · (W + dW) / (L + dL)
ugst = (G.v − us − Vt + K2 · ubs) · K5
id = uds / RDS, for ugst ≥ 0
id = −β · uds · (ugst − uds / 2) + uds / RDS, for ugst < uds
id = −β · ugst² / 2 + uds / RDS, otherwise
Fixed: Beta = 10.5 µA/V², Vt = −1 V, K2 = 0.41, K5 = 0.839, dW = −2.5 µm, dL = −2.1 µm, RDS = 10 MΩ

Implementation

Modelica Standard Library 4.1.0Modelica.Electrical.Analog.Semiconductors.PMOS
MSL documentation

Assumptions and limitations

  • Static model: no capacitances, so no switching transients. No body diode, and no temperature dependence.

See also

Select a block in Gradara and press F1 to open its page offline.