Timer

Time since the input became true (0 while false).

  • signal
  • Boolean
  • Modelica Standard Library
  • 2 ports
BlockTimerKindtimerLibraryLogic

Description

Measures how long the Boolean input has been true. The output is the time since the latest rising edge of u, and 0 while u is false.

Example

Latch, timer, and sampler Start and stop buttons set and reset a flip-flop, which times the run, gates a signal, and samples the start time.

EnableStartStopEnabled startStart edgeStop edgeRunningRun timeSine 1 Hz0Gated sineClockStart time
In Gradara, select a Timer block and press F1, then choose Open example. It opens as a new model in My models, ready to run.

Also in this example:ConstantSine waveClockANDSwitch (logic)RS flip-flopBoolean constantBoolean stepTriggered samplerRising edge

Ports

Inputs 1

  • uBoolean

    Boolean input.

Outputs 1

  • ysignal · s

    Elapsed time since u became true, in seconds; 0 while u is false.

Equations

Modelica
At each rising edge of u: entryTime = t
y = t − entryTime while u, otherwise 0
entryTime = 0 at the start.

Implementation

Modelica Standard Library 4.1.0Modelica.Blocks.Logical.Timer
MSL documentation

Assumptions and limitations

  • If u is already true at the start, no rising edge occurs; entryTime stays 0 and y equals the simulation time t.

Tips

  • Compare y with Greater than threshold to build an on-delay.

See also

Select a block in Gradara and press F1 to open its page offline.