Unit delay

One-sample delay.

  • signal
  • Gradara equations
  • 2 ports
  • 1 parameter
BlockUnit delayKindunitDelayLibraryDiscrete

Description

Delays its input by one sample. At each sample instant the output takes the input stored at the previous instant.

Example

Sampling A sine held, delayed by one sample, and a step summed at a fixed sample rate.

Sine 1 HzHold 0.1 sUnit delay 0.1 sStepDiscrete integrator
In Gradara, select a Unit delay block and press F1, then choose Open example. It opens as a new model in My models, ready to run.

Also in this example:StepSine waveZero-order holdDiscrete integrator

Ports

Inputs 1

  • usignal

    Input signal, read at each sample instant.

Outputs 1

  • ysignal

    Output signal, held between samples.

Parameters

  • Sample periodTs0.001 s

    ≥ 0.0001

    Sample period, in seconds. At least 0.0001 s (default 1 ms).

Equations

Modelica
At t = k · Ts, k = 0, 1, 2, …:
y[k] = u[k − 1], with u[−1] = 0

Implementation

The block’s Modelica model
discrete Real stored(start=0, fixed=true);
when sample(0, Ts) then
  y = pre(stored);
  stored = u;
end when;

Assumptions and limitations

  • Samples are taken at fixed multiples of Ts from time 0; there is no offset or external trigger.
  • The initial output is always 0.

See also

Select a block in Gradara and press F1 to open its page offline.